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 All the previous projects were fun, but what about something practical? If you use a Stamp or other microcontroller, you've probably wished you could have more pins. A PLD makes a perfect adjunct to a microcontroller because you can program whatever I/O functions you need. You could program a PLD with PWM outputs, pulse capture registers, generic I/O, or even a UART. Just to get a feel for how this works, I'll design a super output chip. It will use three wires to talk to the host computer (a Parallax Basic Stamp) and provide 32 outputs. This is similar to the PAK coprocessors that we provide although on a simpler scale and with lots more outputs. The processor will use two wires to send 12 bit commands to the chip. The CPU puts the most significant bit on the data pin and pulses the clock. It then repeats the operation for the other 11 bits. The first bit is always 0 and the second bit is always 1 (you'll see why when we do the design). The next two bits selects one of four output banks (each bank has 8 bits). The final 8 bits tell the chip how to set that bank of outputs. This is usually faster and less resource intensive than having a 32-bit shift register and latch. The most you have to shift to change one to eight bits is one 12-bit command. Of course, if your application requires you to change all 32 bits at the same time, all the time, you might want a big shift register. That's OK -- the chip could do that too with the proper design. However, I'm going to stick with my original design. Obviously we need a 12 bit shift register (or some combination of shift registers that add up to 12 bits). Even if you have to use two 8 bit registers, that would be OK since the optimizer will figure out what parts you aren't using and get rid of them. We'll also need 32 flip flops to latch the output state. A 2 to 4 decoder will select which bank of 8 flip flops should be active. So making a rough estimate, figure you'll need 12 flip flops for the shift register and 32 for the output latches. The decoder has no state, so it needs no flip flops. That's 44 flip flops -- a 9572 will be plenty big enough for this design. The reason for the initial 01 pattern is to give the circuit a signal that tells it the shifting operation is done. When the 1 reaches bit 11, the chip goes into action. The first bit of each command is a 0 so that we can reset during that clock cycle with no ill effect. This allows the chip to operate completely off the data clock and no external oscillator is required. Start a new project as before. Pick a XC9572 chip and XST Verilog again. I called my project "bigout" and you should do the same if you want yours to match. Add a schematic source called bigout to the project. Go to Tools | Create IOMarkers. This brings up a dialog that lets you describe your inputs and outputs:
You can't tell because the dialog is narrow, but there is a close parenthesis after the last 0 in the Outputs box. Press OK and you'll get predefined I/O markers on your schematic. The design will use only four different components:
The shift registers have a sync clear for a very good reason. Remember, bit 11 of the shift register will trigger the output registers to latch. We also want the same signal to reset the shift register so that the next command will clear the register. That requires a sync reset. If it were async, the shift register might clear before the latches operated. Here's the final schematic (click it to see it, it is a bit large):
Once you understand the bit about the leading 01, everything else is straightforward. Do a schematic check and you should get no errors. You'll also want to constrain your clock and reset pins to match the chip's dedicated pins (although the fitter will usually pick up on that). You also probably want to set the constraints for the port pins so that they are in order and make sense. Because the PBX-84 plugs holes 55 to 75 into the breadboard, I wanted port A on those pins as much as possible. You can set up your pin arrangements using chip viewer (from the navigator, open up Design Entry Utilities and then open up User Constraints to find chip viewer). You can also use the implementation editor (although this requires pin names instead of numbers) or edit the text file the compiler uses. It doesn't really matter which method you use. All of these choices are under the User Constraints entry in the navigator. At a minimum, assign ICLK to pin 9 and IRESET to pin 74 You can assign the PORTA, B, C, and D pins as you see fit. IDATA isn't important either, but it is handy to have it on the breadboard strip. Here are my assignments: 9 - ICLK Next up: Hardware!
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