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GPMPU28 manual



The PICPLD board provides several connections between the processor and the CPLD (assuming you did not customize the kit as described in the documentation):

CPLD Pin

Description

10 (GCLK2)

20MHz clock from CPU

9 (GCLK1)

RC2 from CPU

6

RC1 from CPU

5

RC0 from CPU

4

RA5 from CPU

3

RA4 from CPU (note: open drain)

2

RA3 from CPU

1

RA2 from CPU

84

RA1 from CPU

83

RA0 from CPU

The CPLD can use the 20MHz clock from the processor and/or the PIC can generate a slower frequency on RC2 using a variety of methods (including the PIC's hardware PWM generator which is a handy way to make a constant frequency appear on RC2).

The remaining pins are available for general purpose use. Note that on the PIC16F873, PORT A is normally set for analog input, so to use these for digital I/O, you need to take special steps in software. Also, RA4 is an open drain output which means it can sink to ground, but it can't raise its output high. Unless you add an external pull up resistor, you'll probably want to use RA4 for an input.

Keep in mind that the PIC board has a flexible I/O connector. You can customize the board the route different signals to the edge connector  and still retain a connection point for the signal you've replaced. So, for example, if you need to use PORTA for analog input, you can cut some traces on the board and reroute, for example, PORT B bits to JP1 (and therefore, to the CPLD). Then the PORT A bits will be present on JP3 for analog inputs. Refer to the GPMPU28 manual for more details about this type of customization.

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